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// High Level Design Compiler for Intel(R) FPGAs Version 24.2 (Release Build #99.1)
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// SystemVerilog created from i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m0
// Created for function/kernel c_compMM_m
// SystemVerilog created on Wed Mar 26 11:59:07 2025


(* altera_attribute = "-name AUTO_SHIFT_REGISTER_RECOGNITION OFF; -name MESSAGE_DISABLE 10036; -name MESSAGE_DISABLE 10037; -name MESSAGE_DISABLE 14130; -name MESSAGE_DISABLE 14320; -name MESSAGE_DISABLE 15400; -name MESSAGE_DISABLE 14130; -name MESSAGE_DISABLE 10036; -name MESSAGE_DISABLE 12020; -name MESSAGE_DISABLE 12030; -name MESSAGE_DISABLE 12010; -name MESSAGE_DISABLE 12110; -name MESSAGE_DISABLE 14320; -name MESSAGE_DISABLE 13410; -name MESSAGE_DISABLE 113007; -name MESSAGE_DISABLE 10958" *)
module c_compMM_m_i_llvm_fpga_mem_memcoalesce_l0000que_6910_c_compmm_m0 (
    output wire [0:0] out_o_almost_empty,
    output wire [0:0] out_o_empty,
    output wire [15:0] out_o_readdata_0_tpl,
    output wire [15:0] out_o_readdata_1_tpl,
    output wire [15:0] out_o_readdata_2_tpl,
    output wire [15:0] out_o_readdata_3_tpl,
    output wire [15:0] out_o_readdata_4_tpl,
    output wire [15:0] out_o_readdata_5_tpl,
    output wire [15:0] out_o_readdata_6_tpl,
    output wire [15:0] out_o_readdata_7_tpl,
    output wire [15:0] out_o_readdata_8_tpl,
    output wire [15:0] out_o_readdata_9_tpl,
    output wire [15:0] out_o_readdata_10_tpl,
    output wire [15:0] out_o_readdata_11_tpl,
    output wire [15:0] out_o_readdata_12_tpl,
    output wire [15:0] out_o_readdata_13_tpl,
    output wire [15:0] out_o_readdata_14_tpl,
    output wire [15:0] out_o_readdata_15_tpl,
    output wire [15:0] out_o_readdata_16_tpl,
    output wire [15:0] out_o_readdata_17_tpl,
    output wire [15:0] out_o_readdata_18_tpl,
    output wire [15:0] out_o_readdata_19_tpl,
    output wire [15:0] out_o_readdata_20_tpl,
    output wire [15:0] out_o_readdata_21_tpl,
    output wire [15:0] out_o_readdata_22_tpl,
    output wire [15:0] out_o_readdata_23_tpl,
    output wire [15:0] out_o_readdata_24_tpl,
    output wire [15:0] out_o_readdata_25_tpl,
    output wire [15:0] out_o_readdata_26_tpl,
    output wire [15:0] out_o_readdata_27_tpl,
    output wire [15:0] out_o_readdata_28_tpl,
    output wire [15:0] out_o_readdata_29_tpl,
    output wire [15:0] out_o_readdata_30_tpl,
    output wire [15:0] out_o_readdata_31_tpl,
    output wire [15:0] out_o_readdata_32_tpl,
    output wire [15:0] out_o_readdata_33_tpl,
    output wire [15:0] out_o_readdata_34_tpl,
    output wire [15:0] out_o_readdata_35_tpl,
    output wire [15:0] out_o_readdata_36_tpl,
    output wire [15:0] out_o_readdata_37_tpl,
    output wire [15:0] out_o_readdata_38_tpl,
    output wire [15:0] out_o_readdata_39_tpl,
    output wire [15:0] out_o_readdata_40_tpl,
    output wire [15:0] out_o_readdata_41_tpl,
    output wire [15:0] out_o_readdata_42_tpl,
    output wire [15:0] out_o_readdata_43_tpl,
    output wire [15:0] out_o_readdata_44_tpl,
    output wire [15:0] out_o_readdata_45_tpl,
    output wire [15:0] out_o_readdata_46_tpl,
    output wire [15:0] out_o_readdata_47_tpl,
    output wire [15:0] out_o_readdata_48_tpl,
    output wire [15:0] out_o_readdata_49_tpl,
    output wire [15:0] out_o_readdata_50_tpl,
    output wire [15:0] out_o_readdata_51_tpl,
    output wire [15:0] out_o_readdata_52_tpl,
    output wire [15:0] out_o_readdata_53_tpl,
    output wire [15:0] out_o_readdata_54_tpl,
    output wire [15:0] out_o_readdata_55_tpl,
    output wire [15:0] out_o_readdata_56_tpl,
    output wire [15:0] out_o_readdata_57_tpl,
    output wire [15:0] out_o_readdata_58_tpl,
    output wire [15:0] out_o_readdata_59_tpl,
    output wire [15:0] out_o_readdata_60_tpl,
    output wire [15:0] out_o_readdata_61_tpl,
    output wire [15:0] out_o_readdata_62_tpl,
    output wire [15:0] out_o_readdata_63_tpl,
    output wire [0:0] out_o_valid,
    output wire [0:0] out_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_burstcount,
    output wire [127:0] out_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_byteenable,
    output wire [0:0] out_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_enable,
    output wire [0:0] out_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_read,
    output wire [0:0] out_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_write,
    output wire [1023:0] out_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_writedata,
    input wire [0:0] in_flush,
    input wire [1023:0] in_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_readdata,
    input wire [0:0] in_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_readdatavalid,
    input wire [0:0] in_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_waitrequest,
    input wire [0:0] in_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_writeack,
    output wire [9:0] out_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_address,
    input wire [0:0] in_i_stall,
    output wire [0:0] out_o_stall,
    input wire [0:0] in_almost_empty_in,
    input wire [0:0] in_empty_in,
    input wire [63:0] in_i_address,
    input wire [0:0] in_i_predicate,
    input wire [0:0] in_i_valid,
    input wire clock,
    input wire resetn
    );

    wire [0:0] GND_q;
    wire [9:0] addr_trunc_in;
    wire [9:0] addr_trunc_q;
    wire [1023:0] c_i1024_0133_q;
    wire [9:0] c_i10_0136_q;
    wire [127:0] c_i128_0134_q;
    wire [31:0] c_i32_0137_q;
    wire [2:0] c_i3_0138_q;
    wire [1023:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_readdata;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_readdatavalid;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_readdatavalid_bitsignaltemp;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_waitrequest;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_waitrequest_bitsignaltemp;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_writeack;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_writeack_bitsignaltemp;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_clock2x;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_clock2x_bitsignaltemp;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_flush;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_flush_bitsignaltemp;
    wire [9:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_address;
    wire [2:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_atomic_op;
    wire [9:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_bitwiseor;
    wire [127:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_byteenable;
    wire [1023:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_cmpdata;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_predicate;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_predicate_bitsignaltemp;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_stall;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_stall_bitsignaltemp;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_valid;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_valid_bitsignaltemp;
    wire [1023:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_writedata;
    wire [9:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_stream_base_addr;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_stream_reset;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_stream_reset_bitsignaltemp;
    wire [31:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_stream_size;
    wire [9:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_address;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_burstcount;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_burstcount_bitsignaltemp;
    wire [127:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_byteenable;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_enable;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_enable_bitsignaltemp;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_read;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_read_bitsignaltemp;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_write;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_write_bitsignaltemp;
    wire [1023:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_writedata;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_almost_empty;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_almost_empty_bitsignaltemp;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_empty;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_empty_bitsignaltemp;
    wire [4:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_input_fifo_depth;
    wire [1023:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_stall;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_stall_bitsignaltemp;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_valid;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_valid_bitsignaltemp;
    wire [0:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_writeack;
    wire i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_writeack_bitsignaltemp;
    wire [31:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_profile_avm_burstcount_total_incr;
    wire [31:0] i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_profile_bw_incr;
    wire [15:0] ip_dsdk_adapt_bitselect101_b;
    wire [15:0] ip_dsdk_adapt_bitselect103_b;
    wire [15:0] ip_dsdk_adapt_bitselect105_b;
    wire [15:0] ip_dsdk_adapt_bitselect107_b;
    wire [15:0] ip_dsdk_adapt_bitselect109_b;
    wire [15:0] ip_dsdk_adapt_bitselect11_b;
    wire [15:0] ip_dsdk_adapt_bitselect111_b;
    wire [15:0] ip_dsdk_adapt_bitselect113_b;
    wire [15:0] ip_dsdk_adapt_bitselect115_b;
    wire [15:0] ip_dsdk_adapt_bitselect117_b;
    wire [15:0] ip_dsdk_adapt_bitselect119_b;
    wire [15:0] ip_dsdk_adapt_bitselect121_b;
    wire [15:0] ip_dsdk_adapt_bitselect123_b;
    wire [15:0] ip_dsdk_adapt_bitselect125_b;
    wire [15:0] ip_dsdk_adapt_bitselect127_b;
    wire [15:0] ip_dsdk_adapt_bitselect129_b;
    wire [15:0] ip_dsdk_adapt_bitselect13_b;
    wire [15:0] ip_dsdk_adapt_bitselect131_b;
    wire [15:0] ip_dsdk_adapt_bitselect15_b;
    wire [15:0] ip_dsdk_adapt_bitselect17_b;
    wire [15:0] ip_dsdk_adapt_bitselect19_b;
    wire [15:0] ip_dsdk_adapt_bitselect21_b;
    wire [15:0] ip_dsdk_adapt_bitselect23_b;
    wire [15:0] ip_dsdk_adapt_bitselect25_b;
    wire [15:0] ip_dsdk_adapt_bitselect27_b;
    wire [15:0] ip_dsdk_adapt_bitselect29_b;
    wire [15:0] ip_dsdk_adapt_bitselect31_b;
    wire [15:0] ip_dsdk_adapt_bitselect33_b;
    wire [15:0] ip_dsdk_adapt_bitselect35_b;
    wire [15:0] ip_dsdk_adapt_bitselect37_b;
    wire [15:0] ip_dsdk_adapt_bitselect39_b;
    wire [15:0] ip_dsdk_adapt_bitselect41_b;
    wire [15:0] ip_dsdk_adapt_bitselect43_b;
    wire [15:0] ip_dsdk_adapt_bitselect45_b;
    wire [15:0] ip_dsdk_adapt_bitselect47_b;
    wire [15:0] ip_dsdk_adapt_bitselect49_b;
    wire [15:0] ip_dsdk_adapt_bitselect5_b;
    wire [15:0] ip_dsdk_adapt_bitselect51_b;
    wire [15:0] ip_dsdk_adapt_bitselect53_b;
    wire [15:0] ip_dsdk_adapt_bitselect55_b;
    wire [15:0] ip_dsdk_adapt_bitselect57_b;
    wire [15:0] ip_dsdk_adapt_bitselect59_b;
    wire [15:0] ip_dsdk_adapt_bitselect61_b;
    wire [15:0] ip_dsdk_adapt_bitselect63_b;
    wire [15:0] ip_dsdk_adapt_bitselect65_b;
    wire [15:0] ip_dsdk_adapt_bitselect67_b;
    wire [15:0] ip_dsdk_adapt_bitselect69_b;
    wire [15:0] ip_dsdk_adapt_bitselect7_b;
    wire [15:0] ip_dsdk_adapt_bitselect71_b;
    wire [15:0] ip_dsdk_adapt_bitselect73_b;
    wire [15:0] ip_dsdk_adapt_bitselect75_b;
    wire [15:0] ip_dsdk_adapt_bitselect77_b;
    wire [15:0] ip_dsdk_adapt_bitselect79_b;
    wire [15:0] ip_dsdk_adapt_bitselect81_b;
    wire [15:0] ip_dsdk_adapt_bitselect83_b;
    wire [15:0] ip_dsdk_adapt_bitselect85_b;
    wire [15:0] ip_dsdk_adapt_bitselect87_b;
    wire [15:0] ip_dsdk_adapt_bitselect89_b;
    wire [15:0] ip_dsdk_adapt_bitselect9_b;
    wire [15:0] ip_dsdk_adapt_bitselect91_b;
    wire [15:0] ip_dsdk_adapt_bitselect93_b;
    wire [15:0] ip_dsdk_adapt_bitselect95_b;
    wire [15:0] ip_dsdk_adapt_bitselect97_b;
    wire [15:0] ip_dsdk_adapt_bitselect99_b;
    reg [0:0] rst_sync_rst_sclrn;


    // ip_dsdk_adapt_bitselect131(BITSELECT,37)
    assign ip_dsdk_adapt_bitselect131_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[1023:1008];

    // ip_dsdk_adapt_bitselect129(BITSELECT,35)
    assign ip_dsdk_adapt_bitselect129_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[1007:992];

    // ip_dsdk_adapt_bitselect127(BITSELECT,34)
    assign ip_dsdk_adapt_bitselect127_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[991:976];

    // ip_dsdk_adapt_bitselect125(BITSELECT,33)
    assign ip_dsdk_adapt_bitselect125_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[975:960];

    // ip_dsdk_adapt_bitselect123(BITSELECT,32)
    assign ip_dsdk_adapt_bitselect123_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[959:944];

    // ip_dsdk_adapt_bitselect121(BITSELECT,31)
    assign ip_dsdk_adapt_bitselect121_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[943:928];

    // ip_dsdk_adapt_bitselect119(BITSELECT,30)
    assign ip_dsdk_adapt_bitselect119_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[927:912];

    // ip_dsdk_adapt_bitselect117(BITSELECT,29)
    assign ip_dsdk_adapt_bitselect117_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[911:896];

    // ip_dsdk_adapt_bitselect115(BITSELECT,28)
    assign ip_dsdk_adapt_bitselect115_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[895:880];

    // ip_dsdk_adapt_bitselect113(BITSELECT,27)
    assign ip_dsdk_adapt_bitselect113_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[879:864];

    // ip_dsdk_adapt_bitselect111(BITSELECT,26)
    assign ip_dsdk_adapt_bitselect111_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[863:848];

    // ip_dsdk_adapt_bitselect109(BITSELECT,24)
    assign ip_dsdk_adapt_bitselect109_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[847:832];

    // ip_dsdk_adapt_bitselect107(BITSELECT,23)
    assign ip_dsdk_adapt_bitselect107_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[831:816];

    // ip_dsdk_adapt_bitselect105(BITSELECT,22)
    assign ip_dsdk_adapt_bitselect105_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[815:800];

    // ip_dsdk_adapt_bitselect103(BITSELECT,21)
    assign ip_dsdk_adapt_bitselect103_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[799:784];

    // ip_dsdk_adapt_bitselect101(BITSELECT,20)
    assign ip_dsdk_adapt_bitselect101_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[783:768];

    // ip_dsdk_adapt_bitselect99(BITSELECT,83)
    assign ip_dsdk_adapt_bitselect99_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[767:752];

    // ip_dsdk_adapt_bitselect97(BITSELECT,82)
    assign ip_dsdk_adapt_bitselect97_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[751:736];

    // ip_dsdk_adapt_bitselect95(BITSELECT,81)
    assign ip_dsdk_adapt_bitselect95_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[735:720];

    // ip_dsdk_adapt_bitselect93(BITSELECT,80)
    assign ip_dsdk_adapt_bitselect93_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[719:704];

    // ip_dsdk_adapt_bitselect91(BITSELECT,79)
    assign ip_dsdk_adapt_bitselect91_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[703:688];

    // ip_dsdk_adapt_bitselect89(BITSELECT,77)
    assign ip_dsdk_adapt_bitselect89_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[687:672];

    // ip_dsdk_adapt_bitselect87(BITSELECT,76)
    assign ip_dsdk_adapt_bitselect87_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[671:656];

    // ip_dsdk_adapt_bitselect85(BITSELECT,75)
    assign ip_dsdk_adapt_bitselect85_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[655:640];

    // ip_dsdk_adapt_bitselect83(BITSELECT,74)
    assign ip_dsdk_adapt_bitselect83_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[639:624];

    // ip_dsdk_adapt_bitselect81(BITSELECT,73)
    assign ip_dsdk_adapt_bitselect81_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[623:608];

    // ip_dsdk_adapt_bitselect79(BITSELECT,72)
    assign ip_dsdk_adapt_bitselect79_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[607:592];

    // ip_dsdk_adapt_bitselect77(BITSELECT,71)
    assign ip_dsdk_adapt_bitselect77_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[591:576];

    // ip_dsdk_adapt_bitselect75(BITSELECT,70)
    assign ip_dsdk_adapt_bitselect75_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[575:560];

    // ip_dsdk_adapt_bitselect73(BITSELECT,69)
    assign ip_dsdk_adapt_bitselect73_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[559:544];

    // ip_dsdk_adapt_bitselect71(BITSELECT,68)
    assign ip_dsdk_adapt_bitselect71_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[543:528];

    // ip_dsdk_adapt_bitselect69(BITSELECT,66)
    assign ip_dsdk_adapt_bitselect69_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[527:512];

    // ip_dsdk_adapt_bitselect67(BITSELECT,65)
    assign ip_dsdk_adapt_bitselect67_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[511:496];

    // ip_dsdk_adapt_bitselect65(BITSELECT,64)
    assign ip_dsdk_adapt_bitselect65_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[495:480];

    // ip_dsdk_adapt_bitselect63(BITSELECT,63)
    assign ip_dsdk_adapt_bitselect63_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[479:464];

    // ip_dsdk_adapt_bitselect61(BITSELECT,62)
    assign ip_dsdk_adapt_bitselect61_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[463:448];

    // ip_dsdk_adapt_bitselect59(BITSELECT,61)
    assign ip_dsdk_adapt_bitselect59_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[447:432];

    // ip_dsdk_adapt_bitselect57(BITSELECT,60)
    assign ip_dsdk_adapt_bitselect57_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[431:416];

    // ip_dsdk_adapt_bitselect55(BITSELECT,59)
    assign ip_dsdk_adapt_bitselect55_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[415:400];

    // ip_dsdk_adapt_bitselect53(BITSELECT,58)
    assign ip_dsdk_adapt_bitselect53_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[399:384];

    // ip_dsdk_adapt_bitselect51(BITSELECT,57)
    assign ip_dsdk_adapt_bitselect51_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[383:368];

    // ip_dsdk_adapt_bitselect49(BITSELECT,55)
    assign ip_dsdk_adapt_bitselect49_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[367:352];

    // ip_dsdk_adapt_bitselect47(BITSELECT,54)
    assign ip_dsdk_adapt_bitselect47_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[351:336];

    // ip_dsdk_adapt_bitselect45(BITSELECT,53)
    assign ip_dsdk_adapt_bitselect45_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[335:320];

    // ip_dsdk_adapt_bitselect43(BITSELECT,52)
    assign ip_dsdk_adapt_bitselect43_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[319:304];

    // ip_dsdk_adapt_bitselect41(BITSELECT,51)
    assign ip_dsdk_adapt_bitselect41_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[303:288];

    // ip_dsdk_adapt_bitselect39(BITSELECT,50)
    assign ip_dsdk_adapt_bitselect39_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[287:272];

    // ip_dsdk_adapt_bitselect37(BITSELECT,49)
    assign ip_dsdk_adapt_bitselect37_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[271:256];

    // ip_dsdk_adapt_bitselect35(BITSELECT,48)
    assign ip_dsdk_adapt_bitselect35_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[255:240];

    // ip_dsdk_adapt_bitselect33(BITSELECT,47)
    assign ip_dsdk_adapt_bitselect33_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[239:224];

    // ip_dsdk_adapt_bitselect31(BITSELECT,46)
    assign ip_dsdk_adapt_bitselect31_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[223:208];

    // ip_dsdk_adapt_bitselect29(BITSELECT,45)
    assign ip_dsdk_adapt_bitselect29_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[207:192];

    // ip_dsdk_adapt_bitselect27(BITSELECT,44)
    assign ip_dsdk_adapt_bitselect27_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[191:176];

    // ip_dsdk_adapt_bitselect25(BITSELECT,43)
    assign ip_dsdk_adapt_bitselect25_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[175:160];

    // ip_dsdk_adapt_bitselect23(BITSELECT,42)
    assign ip_dsdk_adapt_bitselect23_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[159:144];

    // ip_dsdk_adapt_bitselect21(BITSELECT,41)
    assign ip_dsdk_adapt_bitselect21_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[143:128];

    // ip_dsdk_adapt_bitselect19(BITSELECT,40)
    assign ip_dsdk_adapt_bitselect19_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[127:112];

    // ip_dsdk_adapt_bitselect17(BITSELECT,39)
    assign ip_dsdk_adapt_bitselect17_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[111:96];

    // ip_dsdk_adapt_bitselect15(BITSELECT,38)
    assign ip_dsdk_adapt_bitselect15_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[95:80];

    // ip_dsdk_adapt_bitselect13(BITSELECT,36)
    assign ip_dsdk_adapt_bitselect13_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[79:64];

    // ip_dsdk_adapt_bitselect11(BITSELECT,25)
    assign ip_dsdk_adapt_bitselect11_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[63:48];

    // ip_dsdk_adapt_bitselect9(BITSELECT,78)
    assign ip_dsdk_adapt_bitselect9_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[47:32];

    // ip_dsdk_adapt_bitselect7(BITSELECT,67)
    assign ip_dsdk_adapt_bitselect7_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[31:16];

    // ip_dsdk_adapt_bitselect5(BITSELECT,56)
    assign ip_dsdk_adapt_bitselect5_b = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata[15:0];

    // c_i32_0137(CONSTANT,17)
    assign c_i32_0137_q = $unsigned(32'b00000000000000000000000000000000);

    // c_i1024_0133(CONSTANT,10)
    assign c_i1024_0133_q = $unsigned(1024'b0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000);

    // c_i128_0134(CONSTANT,14)
    assign c_i128_0134_q = $unsigned(128'b00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000);

    // c_i10_0136(CONSTANT,12)
    assign c_i10_0136_q = $unsigned(10'b0000000000);

    // c_i3_0138(CONSTANT,18)
    assign c_i3_0138_q = $unsigned(3'b000);

    // addr_trunc(ROUND,9)
    assign addr_trunc_in = in_i_address[9:0];
    assign addr_trunc_q = addr_trunc_in[9:0];

    // GND(CONSTANT,0)
    assign GND_q = $unsigned(1'b0);

    // i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1(EXTIFACE,19)
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_readdata = in_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_readdata;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_readdatavalid = in_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_readdatavalid;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_waitrequest = in_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_waitrequest;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_writeack = in_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_writeack;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_clock2x = GND_q;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_flush = in_flush;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_address = addr_trunc_q;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_atomic_op = c_i3_0138_q;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_bitwiseor = c_i10_0136_q;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_byteenable = c_i128_0134_q;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_cmpdata = c_i1024_0133_q;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_predicate = GND_q;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_stall = in_i_stall;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_valid = in_i_valid;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_writedata = c_i1024_0133_q;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_stream_base_addr = c_i10_0136_q;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_stream_reset = GND_q;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_stream_size = c_i32_0137_q;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_readdatavalid_bitsignaltemp = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_readdatavalid[0];
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_waitrequest_bitsignaltemp = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_waitrequest[0];
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_writeack_bitsignaltemp = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_writeack[0];
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_clock2x_bitsignaltemp = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_clock2x[0];
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_flush_bitsignaltemp = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_flush[0];
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_predicate_bitsignaltemp = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_predicate[0];
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_stall_bitsignaltemp = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_stall[0];
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_valid_bitsignaltemp = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_valid[0];
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_stream_reset_bitsignaltemp = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_stream_reset[0];
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_burstcount[0] = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_burstcount_bitsignaltemp;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_enable[0] = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_enable_bitsignaltemp;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_read[0] = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_read_bitsignaltemp;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_write[0] = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_write_bitsignaltemp;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_almost_empty[0] = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_almost_empty_bitsignaltemp;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_empty[0] = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_empty_bitsignaltemp;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_stall[0] = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_stall_bitsignaltemp;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_valid[0] = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_valid_bitsignaltemp;
    assign i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_writeack[0] = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_writeack_bitsignaltemp;
    lsu_top #(
        .ABITS_PER_LMEM_BANK(0),
        .ALMOST_EMPTY_THRESH(7),
        .UPSTREAM_STALL_LATENCY(7),
        .ADDRSPACE(1025),
        .ALIGNMENT_BYTES(2),
        .ALLOW_HIGH_SPEED_FIFO_USAGE(0),
        .ASYNC_RESET(0),
        .ATOMIC(0),
        .ATOMIC_WIDTH(3),
        .AVM_READ_DATA_LATENESS(0),
        .AVM_WRITE_DATA_LATENESS(0),
        .AWIDTH(10),
        .BURSTCOUNT_WIDTH(1),
        .DOWNSTREAM_STALL_IN_EARLINESS(3),
        .ENABLE_BANKED_MEMORY(0),
        .FORCE_NOP_SUPPORT(0),
        .HIGH_FMAX(1),
        .INPUTFIFO_USEDW_MAXBITS(5),
        .KERNEL_SIDE_MEM_LATENCY(31),
        .LMEM_ADDR_PERMUTATION_STYLE(0),
        .MEMORY_SIDE_MEM_LATENCY(0),
        .MWIDTH_BYTES(128),
        .NUMBER_BANKS(1),
        .PROFILE_ADDR_TOGGLE(0),
        .READ(1),
        .STALLFREE(0),
        .STYLE("BURST-NON-ALIGNED"),
        .SYNCHRONIZE_RESET(0),
        .USECACHING(0),
        .USEINPUTFIFO(0),
        .USEOUTPUTFIFO(1),
        .USE_BYTE_EN(0),
        .USE_STALL_LATENCY(1),
        .USE_WRITE_ACK(0),
        .WIDE_DATA_SLICING(0),
        .WIDTH_BYTES(128),
        .WRITEDATAWIDTH_BYTES(128)
    ) thei_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1 (
        .avm_readdata(in_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_readdata),
        .avm_readdatavalid(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_readdatavalid_bitsignaltemp),
        .avm_waitrequest(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_waitrequest_bitsignaltemp),
        .avm_writeack(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_writeack_bitsignaltemp),
        .clock2x(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_clock2x_bitsignaltemp),
        .flush(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_flush_bitsignaltemp),
        .i_address(addr_trunc_q),
        .i_atomic_op(c_i3_0138_q),
        .i_bitwiseor(c_i10_0136_q),
        .i_byteenable(c_i128_0134_q),
        .i_cmpdata(c_i1024_0133_q),
        .i_predicate(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_predicate_bitsignaltemp),
        .i_stall(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_stall_bitsignaltemp),
        .i_valid(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_i_valid_bitsignaltemp),
        .i_writedata(c_i1024_0133_q),
        .stream_base_addr(c_i10_0136_q),
        .stream_reset(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_stream_reset_bitsignaltemp),
        .stream_size(c_i32_0137_q),
        .avm_address(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_address),
        .avm_burstcount(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_burstcount_bitsignaltemp),
        .avm_byteenable(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_byteenable),
        .avm_enable(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_enable_bitsignaltemp),
        .avm_read(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_read_bitsignaltemp),
        .avm_write(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_write_bitsignaltemp),
        .avm_writedata(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_writedata),
        .o_almost_empty(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_almost_empty_bitsignaltemp),
        .o_empty(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_empty_bitsignaltemp),
        .o_input_fifo_depth(),
        .o_readdata(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_readdata),
        .o_stall(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_stall_bitsignaltemp),
        .o_valid(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_valid_bitsignaltemp),
        .o_writeack(i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_writeack_bitsignaltemp),
        .profile_avm_burstcount_total_incr(),
        .profile_bw_incr(),
        .clock(clock),
        .resetn(rst_sync_rst_sclrn[0])
    );

    // dupName_0_sync_out_aunroll_x(GPOUT,2)@68
    assign out_o_almost_empty = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_almost_empty;
    assign out_o_empty = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_empty;
    assign out_o_readdata_0_tpl = ip_dsdk_adapt_bitselect5_b;
    assign out_o_readdata_1_tpl = ip_dsdk_adapt_bitselect7_b;
    assign out_o_readdata_2_tpl = ip_dsdk_adapt_bitselect9_b;
    assign out_o_readdata_3_tpl = ip_dsdk_adapt_bitselect11_b;
    assign out_o_readdata_4_tpl = ip_dsdk_adapt_bitselect13_b;
    assign out_o_readdata_5_tpl = ip_dsdk_adapt_bitselect15_b;
    assign out_o_readdata_6_tpl = ip_dsdk_adapt_bitselect17_b;
    assign out_o_readdata_7_tpl = ip_dsdk_adapt_bitselect19_b;
    assign out_o_readdata_8_tpl = ip_dsdk_adapt_bitselect21_b;
    assign out_o_readdata_9_tpl = ip_dsdk_adapt_bitselect23_b;
    assign out_o_readdata_10_tpl = ip_dsdk_adapt_bitselect25_b;
    assign out_o_readdata_11_tpl = ip_dsdk_adapt_bitselect27_b;
    assign out_o_readdata_12_tpl = ip_dsdk_adapt_bitselect29_b;
    assign out_o_readdata_13_tpl = ip_dsdk_adapt_bitselect31_b;
    assign out_o_readdata_14_tpl = ip_dsdk_adapt_bitselect33_b;
    assign out_o_readdata_15_tpl = ip_dsdk_adapt_bitselect35_b;
    assign out_o_readdata_16_tpl = ip_dsdk_adapt_bitselect37_b;
    assign out_o_readdata_17_tpl = ip_dsdk_adapt_bitselect39_b;
    assign out_o_readdata_18_tpl = ip_dsdk_adapt_bitselect41_b;
    assign out_o_readdata_19_tpl = ip_dsdk_adapt_bitselect43_b;
    assign out_o_readdata_20_tpl = ip_dsdk_adapt_bitselect45_b;
    assign out_o_readdata_21_tpl = ip_dsdk_adapt_bitselect47_b;
    assign out_o_readdata_22_tpl = ip_dsdk_adapt_bitselect49_b;
    assign out_o_readdata_23_tpl = ip_dsdk_adapt_bitselect51_b;
    assign out_o_readdata_24_tpl = ip_dsdk_adapt_bitselect53_b;
    assign out_o_readdata_25_tpl = ip_dsdk_adapt_bitselect55_b;
    assign out_o_readdata_26_tpl = ip_dsdk_adapt_bitselect57_b;
    assign out_o_readdata_27_tpl = ip_dsdk_adapt_bitselect59_b;
    assign out_o_readdata_28_tpl = ip_dsdk_adapt_bitselect61_b;
    assign out_o_readdata_29_tpl = ip_dsdk_adapt_bitselect63_b;
    assign out_o_readdata_30_tpl = ip_dsdk_adapt_bitselect65_b;
    assign out_o_readdata_31_tpl = ip_dsdk_adapt_bitselect67_b;
    assign out_o_readdata_32_tpl = ip_dsdk_adapt_bitselect69_b;
    assign out_o_readdata_33_tpl = ip_dsdk_adapt_bitselect71_b;
    assign out_o_readdata_34_tpl = ip_dsdk_adapt_bitselect73_b;
    assign out_o_readdata_35_tpl = ip_dsdk_adapt_bitselect75_b;
    assign out_o_readdata_36_tpl = ip_dsdk_adapt_bitselect77_b;
    assign out_o_readdata_37_tpl = ip_dsdk_adapt_bitselect79_b;
    assign out_o_readdata_38_tpl = ip_dsdk_adapt_bitselect81_b;
    assign out_o_readdata_39_tpl = ip_dsdk_adapt_bitselect83_b;
    assign out_o_readdata_40_tpl = ip_dsdk_adapt_bitselect85_b;
    assign out_o_readdata_41_tpl = ip_dsdk_adapt_bitselect87_b;
    assign out_o_readdata_42_tpl = ip_dsdk_adapt_bitselect89_b;
    assign out_o_readdata_43_tpl = ip_dsdk_adapt_bitselect91_b;
    assign out_o_readdata_44_tpl = ip_dsdk_adapt_bitselect93_b;
    assign out_o_readdata_45_tpl = ip_dsdk_adapt_bitselect95_b;
    assign out_o_readdata_46_tpl = ip_dsdk_adapt_bitselect97_b;
    assign out_o_readdata_47_tpl = ip_dsdk_adapt_bitselect99_b;
    assign out_o_readdata_48_tpl = ip_dsdk_adapt_bitselect101_b;
    assign out_o_readdata_49_tpl = ip_dsdk_adapt_bitselect103_b;
    assign out_o_readdata_50_tpl = ip_dsdk_adapt_bitselect105_b;
    assign out_o_readdata_51_tpl = ip_dsdk_adapt_bitselect107_b;
    assign out_o_readdata_52_tpl = ip_dsdk_adapt_bitselect109_b;
    assign out_o_readdata_53_tpl = ip_dsdk_adapt_bitselect111_b;
    assign out_o_readdata_54_tpl = ip_dsdk_adapt_bitselect113_b;
    assign out_o_readdata_55_tpl = ip_dsdk_adapt_bitselect115_b;
    assign out_o_readdata_56_tpl = ip_dsdk_adapt_bitselect117_b;
    assign out_o_readdata_57_tpl = ip_dsdk_adapt_bitselect119_b;
    assign out_o_readdata_58_tpl = ip_dsdk_adapt_bitselect121_b;
    assign out_o_readdata_59_tpl = ip_dsdk_adapt_bitselect123_b;
    assign out_o_readdata_60_tpl = ip_dsdk_adapt_bitselect125_b;
    assign out_o_readdata_61_tpl = ip_dsdk_adapt_bitselect127_b;
    assign out_o_readdata_62_tpl = ip_dsdk_adapt_bitselect129_b;
    assign out_o_readdata_63_tpl = ip_dsdk_adapt_bitselect131_b;
    assign out_o_valid = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_valid;

    // dupName_0_regfree_osync_x(GPOUT,3)
    assign out_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_burstcount = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_burstcount;

    // dupName_1_regfree_osync_x(GPOUT,4)
    assign out_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_byteenable = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_byteenable;

    // dupName_2_regfree_osync_x(GPOUT,5)
    assign out_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_enable = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_enable;

    // dupName_3_regfree_osync_x(GPOUT,6)
    assign out_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_read = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_read;

    // dupName_4_regfree_osync_x(GPOUT,7)
    assign out_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_write = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_write;

    // dupName_5_regfree_osync_x(GPOUT,8)
    assign out_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_writedata = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_writedata;

    // regfree_osync(GPOUT,153)
    assign out_memcoalesce_load_c_compMM_m_fpgaunique_6910_c_compMM_m_avm_address = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_avm_address;

    // sync_out(GPOUT,155)@20000000
    assign out_o_stall = i_llvm_fpga_mem_memcoalesce_load_c_compmm_m_fpgaunique_6910_c_compmm_m1_o_stall;

    // rst_sync(RESETSYNC,157)
    acl_reset_handler #(
        .ASYNC_RESET(0),
        .USE_SYNCHRONIZER(1),
        .PULSE_EXTENSION(0),
        .PIPE_DEPTH(3),
        .DUPLICATE(1)
    ) therst_sync (
        .clk(clock),
        .i_resetn(resetn),
        .o_sclrn(rst_sync_rst_sclrn)
    );

endmodule
