Knowledge Base Article
Why is there a fitter failure when we are migrating x6 or x8 bonding design from 25.3 to 25.3.1?
Description
Due to an improvement in Quartus® Prime Pro Edition software version 25.3.1, there is a change in the bonding placement for Agilex™ 5 GTS PMA/FEC Direct PHY IP. Following diagram shows the difference in the bonding placement between Agilex™ 5 GTS PMA/FEC Direct PHY IP in the Quartus Prime Pro Edition software version 25.3 and 25.3.1.
Resolution
For a workaround, for users that have designed their boards using the bonded port ordering in 25.3 or previous and do not want to change their physical pins or redesign, users can reassign their tx parallel data accordingly in RTL accordingly.
|
|
Bank |
Mapping in 25.3 |
Current Mapping in 25.3.1 & Workaround for 25.3 | ||
|
x6 Bonding |
Bank 1C/4C |
CH3 |
tx_parallel_data [319:240] |
CH5 |
tx_parallel_data [479:400] --> Rearrange to tx_parallel_data [319:240] |
|
CH2 |
tx_parallel_data [239:160] |
CH4 |
tx_parallel_data [399:320] --> Rearrange to tx_parallel_data [239:160] | ||
|
CH1 |
tx_parallel_data [159:80] |
CH3 |
tx_parallel_data [319:240] --> Rearrange to tx_parallel_data [159:80] | ||
|
CH0 |
tx_parallel_data [79:0] |
CH2 |
tx_parallel_data [239:160] --> Rearrange to tx_parallel_data [79:0] | ||
|
Bank 1B/4B |
CH5 |
tx_parallel_data [479:400] |
CH1 |
tx_parallel_data [159:80] --> Rearrange to tx_parallel_data [479:400] | |
|
CH4 |
tx_parallel_data [399:320] |
CH0 |
tx_parallel_data [79:0] --> Rearrange to tx_parallel_data [399:320] | ||
|
|
Mapping in 25.3 |
Current Mapping in 25.3.1 & Workaround for 25.3 | |||
|
x8 Bonding |
Bank 1B/4B |
CH3 |
tx_parallel_data [319:240] |
CH7 |
tx_parallel_data [639:560] --> Rearrange to tx_parallel_data [319:240] |
|
CH2 |
tx_parallel_data [239:160] |
CH6 |
tx_parallel_data [559:480] --> Rearrange to tx_parallel_data [239:160] | ||
|
CH1 |
tx_parallel_data [159:80] |
CH5 |
tx_parallel_data [479:400] --> Rearrange to tx_parallel_data [159:80] | ||
|
CH0 |
tx_parallel_data [79:0] |
CH4 |
tx_parallel_data [399:320] --> Rearrange to tx_parallel_data [79:0] | ||
|
Bank 1A/4A |
CH7 |
tx_parallel_data [639:560] |
CH3 |
tx_parallel_data [319:240] --> Rearrange to tx_parallel_data [639:560] | |
|
CH6 |
tx_parallel_data [559:480] |
CH2 |
tx_parallel_data [239:160] --> Rearrange to tx_parallel_data [559:480] | ||
|
CH5 |
tx_parallel_data [479:400] |
CH1 |
tx_parallel_data [159:80] --> Rearrange to tx_parallel_data [479:400] | ||
|
CH4 |
tx_parallel_data [399:320] |
CH0 |
tx_parallel_data [79:0] --> Rearrange to tx_parallel_data [399:320] | ||