Knowledge Base Article

Why is the aFrameCheckSequenceErrors counter of the Triple Speed Ethernet (TSE) IP core incremented when alignment errors occur?

Description
Due to a bug in the Triple Speed Ethernet (TSE) IP core, starting in IP version 13.0, the aFrameCheckSequenceErrors counter may be incremented when alignment errors occur. A frame with alignment errors should be recognized as an invalid frame, hence aFrameCheckSequenceErrors should not be incremented.
Resolution
This bug is fixed in IP core version 14.1 and later.
Updated 20 days ago
Version 3.0
Arria® 10 FPGAs and SoCs
Arria® II FPGAs
Arria® V FPGAs and SoCs
Cyclone® IV FPGAs
Cyclone® V FPGAs and SoCs
FPGA Dev Tools Quartus II Software
Stratix® 10 FPGAs and SoCs
Stratix® IV FPGAs
Stratix® V FPGAs
troubleshooting
No CommentsBe the first to comment