Why doesn't the F-Tile Ethernet Intel® FPGA Hard IP with PTP enabled support the Aldec* Riviera* VHDL simulator in the Intel® Quartus® Prime Pro Edition Software version 22.4 and earlier?

Description

Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.4 and earlier, the F-Tile Ethernet Intel® FPGA Hard IP with PTP enabled doesn't support the Aldec* Riviera* VHDL simulator.
You might get stuck waiting for TX/RX PTP Offset Data Valid assertion when simulating with the Aldec* Riviera* VHDL simulator.

Resolution

There is no workaround for this problem.
This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.