Why does the start_basic_test procedure fail when running the GTS JESD204B FPGA IP Design Example on the Agilex™ 5 FPGA hardware?

Description

Due to a problem in the Quartus® Prime Pro Edition Software version 25.3, you may observe intermittent failures when running the start_basic_test procedure with the GTS JESD204B FPGA IP Design Example.

Resolution

To work around this problem in the Quartus® Prime Pro Edition Software versions 25.3, download and install the patch below.

After installing the patch, do the following:

1. Depending on the data rate, configure the IP ➤ Analog Parameters ➤ Analog Rx ➤ RX Adaptation mode:
   1. Manual: if data rate <= 7Gbps
   2. Auto: if data rate > 7Gbps
2. Regenerate the design example.

This problem will be fixed in a future release of the Quartus® Prime Pro Edition Software.