Why does the SD/eMMC U-Boot driver fail to select the SDR12 mode for Agilex® 5 FPGA and Agilex® 3 FPGA devices in release 25.3.1 release and before?

Description

Due to a problem in the U-Boot SD/eMMC driver in Agilex® 5 FPGA and Agilex® 3 FPGA devices in release 25.3.1 and before, U-Boot fails to select the SD SDR12 mode regardless of using the sd-uhs-sdr12 parameter in the device tree. The reason behind this problem is that the driver tries the SD_HS (50 MHz) mode first, so if this succeeds, then the SDR12 (25 MHz) is not tried. Because of this problem, currently, there is no direct method to force the driver to choose SDR12 mode.

Resolution

To workaround this problem, you need to use the following configuration in the device tree along with the SD/eMMC driver source code modification:

1. U-Boot device tree configuration:

• Remove no-1-8-v: Allows the MMC stack to perform voltage switching to 1.8V, which is required for UHS modes
• Remove cap-sd-highspeed: Ensures SDR12 becomes the highest priority mode available
• Add sd-uhs-sdr12: Explicitly declares SDR12 support

&mmc { status = "okay"; no-mmc; disable-wp; //no-1-8-v; // Remove or keep commented out //cap-sd-highspeed; // Remove or keep commented out sd-uhs-sdr12; // Add this property vmmc-supply = <&sd_emmc_power>; vqmmc-supply = <&sd_io_1v8_reg>; max-frequency = <200000000>; sdhci-caps = <0x00000000 0x0000c800>; sdhci-caps-mask = <0x00002007 0x0000ff00>; // ... (rest of PHY timing configuration remains unchanged) };

2. Modify the U-Boot drivers/mmc/sdhci-cadence.c source code as follows:

You must update the host->quirks parameter to disable the SD High Speed mode at the driver level, providing an additional safeguard to ensure SDR12 is selected.

static int sdhci_cdns_probe(struct udevice *dev) {  :  host->quirks |= SDHCI_QUIRK_WAIT_SEND_CMD;  host->quirks |= SDHCI_QUIRK_BROKEN_HISPD_MODE; // Add this line  : }

This problem will be fixed in a future release.