Why does the RX MAC of the F-Tile 25G Ethernet Altera® IP report FCS errors?

Description

Due to a problem in the Quartus® Prime Pro Edition Software version 23.2, you may see random FCS errors in the RX MAC of the F-Tile 25G Ethernet Altera® IP.

This problem is caused by

1. Recovered clock ("o_clk_rec_div64") used in the RX MAC sub-module in the F-Tile 25G Ethernet IP.
2. Due to underflow condition in Tx/Rx FIFOs interfacing MAC and PCS sub-module.
3. Due to Tx/Rx FIFOs are out-of-reset prior to "o_tx_lanes_stable" and "rx_pcs_ready".
4. In 25G+RSFEC configuration, due to no logic to handle AM Valid cycles.

Resolution

A patch is available to fix this problem for the Quartus® Prime Pro Edition Software version 23.2 and 24.2.
Download and install Patch for 0.54 for version 23.2 or 0.12 for version 24.2 from the appropriate link below.
 
For Quartus® Prime Pro Edition Software version 23.2

• Download patch 0.54 for Windows (Quartus-23.2-0.54-windows.exe)
• Download patch 0.54 for Linux (Quartus-23.2-0.54-linux.run)
• Download the Readme for patch 0.54 (Quartus-23.2-0.54-readme.txt)

 For Quartus® Prime Pro Edition software version 24.2

• Download patch 0.12 for Windows (Quartus-24.2-0.12-windows.exe)
• Download patch 0.12 for Linux (Quartus-24.2-0.12-linux.run)
• Download the Readme for patch 0.12 (Quartus-24.2-0.12-readme.txt)

  This problem is fixed beginning with the Quartus® Prime Pro Edition Software version 24.3.