Why does the rready signal deassert when simulating High Bandwidth Memory (HBM2E) Interface Intel Agilex® 7 M-Series FPGA IP?

Description

Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.4 and later, you might observe the AXI4 protocol violation at NOC input when the UNOC mode is enabled.

Resolution

This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.