Why does the rdempty output of my DCFIFO get momentarily deasserted when asserting aclr?

Description

Due to a problem in the Quartus® II software, asserting the aclr input on an empty DCFIFO may cause the rdempty output to be momentarily deasserted. An external register sampling the rdempty output may incorrectly interpret this as a non-empty FIFO.

Resolution

To prevent an external register from incorrectly capturing this glitch, ensure one of the following is true:

• The external register should use the same reset which is connected to the aclr input of the DCFIFO megafunction, or
• The reset connected to the aclr input of the DCFIFO should be asserted synchronously to the clock which drives the external register.

This problem is scheduled to be fixed in a future release of the Quartus II software.