Why does the P-Tile Multi Channel DMA FPGA IP for PCI Express* design example generation show the target development kit as a Stratix® 10 FPGA board?

Description

Due to a problem in the Quartus® Prime Pro Edition Software version 24.2, the P-Tile Multichannel DMA FPGA IP for PCI Express* Design Example progress window shows the target board is the Stratix® 10 FPGA Development kit rather than the selected target Agilex™ 7 FPGA F-Series Development Kit (Production 1 P-Tile & E-Tile).

Resolution

This problem is fixed in version 24.3 of the Quartus® Prime Pro Edition Software.