Why does the Nios development board reset after I program my design into the Altera FGPA?

Description

One reason this can happen is because the unused pins in the FPGA design are not tri-stated. Make sure you have the unused pins for your Quartus II project set to be Inputs Tristated. You can do this as follows in the Quartus II tool:

1. Click on Assignments -> Device
2. Click on the Device and Pin Options button
3. Click on the Unused Pins tab.
4. Click on the As inputs, tri-stated radio button