Why does the nINIT_DONE signal not behave as expected, as described in the configuration timing diagram for Agilex™ 7 and Agilex™ 5 FPGAs in the Configuration User Guide?

Description

After Agilex™ 7 and Agilex™ 5 configuration User Guide version 24.2, the nINIT_DONE signal in Figure 4. Power-On, Configuration, and Reconfiguration Timing Diagram, under section 2.1. Agilex™ 7 Configuration Timing Diagram, will be updated in the future release.

User can refer to the latest version of Configuration User Guide for Agilex™ 7 and Agilex™ 5 devices for the details.

Device Configuration User Guide: Agilex™ 5 FPGAs and SoCs

Agilex™ 7 Configuration User Guide

Resolution

This problem is planned to be fixed in the future release of Configuration User Guide for Agilex™ 7 and  Agilex™ 5 devices.