Knowledge Base Article

Why does the Intel® FPGA P-tile Avalon® memory-mapped IP for PCI Express* not support 500MHz PLD Clock Frequency in the Intel® Quartus® Prime Pro Edition Software version 20.4 ?

Description

Due to a problem in the Intel® Quartus® Prime Pro Edition software version 20.4, "500MHz" is not listed in the "PLD Clock Frequency" menu.

This problem only affects the Intel Agilex® 7 FPGA P-tile PCIe* Gen4 x8 mode generated in the Intel® Quartus® Prime Pro Edition Software version 20.4.

Resolution

A patch is available to fix this problem for the Intel® Quartus® Prime Pro Edition Software version 20.4.

Download and install Patch 0.11 from the appropriate link below.

This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 21.1.

Updated 3 months ago
Version 2.0
No CommentsBe the first to comment