Why does the Intel® Low Latency 40-Gbps Ethernet IP forward RUNT packets as good packets?

Description

Due to a problem with the Intel® Arria® 10 and the Stratix® V FPGA versions of the Intel® Low Latency 40-Gbps Ethernet IP, runt packets may be incorrectly forwarded to the user logic as good packets.

The MAC register counters 0x900/0x901 CNTR_RX_FRAGMENTS and 0x904/0x905 CNTR_RX_FCS will not count these runt frames.

Resolution

To work around this problem, modify your user logic to filter short packets where SOP, EOP, and VALID are asserted in the same clock cycle.

This problem is not scheduled to be fixed in future releases of the Intel® Quartus® Prime Software.

The Intel® Stratix® 10 FPGA version of the Intel® Low Latency 40-Gbps Ethernet IP is not affected by this problem.