Why does the CPRI Intel® FPGA IP Design Example for 24G variants with the Intel® Stratix® 10 L/H-Tile device fail to simulate when using the Cadence Xcelium* simulator?

Description

Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.4 and earlier, you might see the CPRI Intel® FPGA IP Design Example for 24G variants with the Intel® Stratix® 10 L/H-Tile device fails to simulate when using the Cadence Xcelium* simulator.

Resolution

There is no workaround for this problem.
This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.