Why does the Avalon® streaming interface of my DSP Builder for Intel® FPGAs component fail to connect in Platform Designer?

Description

Due to a problem in DSP Builder for Intel® FPGAs version 20.3 and earlier, you may see that the Avalon® streaming interfaces of your DSP Builder for Intel® FPGAs component fails in Platform Designer. This problem occurs when you have selected single conduit generation in DSP builder for Intel® FPGAs. The ports for the Avalon® streaming interface ports are not written to the hw.tcl file.

Resolution

To work around this problem, select multiple conduit generation in DSP Builder for Intel® FPGAs or add the missing ports to the hw.tcl file manually.

This problem is fixed starting with the Intel® Quartus® Prime Pro Edition software version 20.4.