Why does the ALTECC decoder simulation have glitches when the parity bit is incorrect?

Description

In the Quartus® II software version 12.1 SP1 and later, on the output of the ALTECC decoder megafunction you may see glitches on the parity bit for all single-bit errors. 

Resolution

To work around this problem, add one pipeline stage on the decoding result by setting output latency of 1 clock cycle in ALTECC wizard.