Why does simulation of the JESD204B IP Example Design fail when the Soft PCS is enabled?

Description

Due to a known issue in Quartus® II software version 15.0, simulation of the JESD204B IP Example Design may fail with the following messages if generated in Soft PCS mode :

# Pattern Checker(s): No valid data found!
# JESD204B Tx Core(s): Tx link error(s) found!
# JESD204B Rx Core(s): OK!
# TESTBENCH_FAILED: SIM FAILED!

This failure occurs because the PMA_WIDTH setting in the ATX PLL is incorrectly set for the Soft PCS mode Example Design.

 

Resolution

To work around this, change the PMA_WIDTH setting in the gen_ed_sim_*.tcl script from 20 to 40, and re-run the script.

This issue is scheduled to be fixed in a future version of the Quartus II software.