Why does rx_freqlocked signal get stuck low, even though the tx_clkout and rx_clkout are successfully reconfigured, after Channel Reconfiguration in Cyclone IV GX devices?

Description

You may see rx_freqlocked signal get stuck in de-asserted state after channel reconfiguration in Cyclone IV GX devices, even though the tx_clkout and rx_clkout are successfully reconfigured.  You may observe this behavior in Quartus II 10.1 sp1 or earlier software.

Take the following steps to workaround this issue.

1. Install patch 0.36 for Quartus II 10.1 software or patch 1.03 for 10.1 sp1 software.  You should move your design to the latest Quartus II version (11.0 and later), if you created your design in 10.0 sp1 or earlier versions.
2. Regenerate ALTGX_RECONFIG Megawizard files.
3. Regenerate GXB MIF/HEX files.
4. Perform reconfiguration using newly generated MIF/HEX files.

Patch 1.03 for Quartus II software version 10.1SP1

• PC patch 1.03 for Quartus II Software version 10.1SP1
• Linux patch 1.03 for Quartus II Software version 10.1SP1
• Readme file for patch 1.03 for Quartus II Software version 10.1SP1 

Patch 0.36 for Quartus II software version 10.1

• PC patch 0.36 for Quartus II Software version 10.1
• Linux patch 0.36 for Quartus II Software version 10.1
• Readme file for patch 0.36 for Quartus II Software version 10.1 

Related Articles

• Are there any problems with channel 3 of a transceiver block after dynamic reconfiguration in Cyclone IV GX devices using Quartus II Software Version 10.1SP1 and earlier?
• Why is the rx_freqlocked signal stuck in deasserted state after Cyclone IV GX transceiver PLL reconfiguration? What are the correct steps for Cyclone IV GX transceiver PLL reconfiguration?