Why does Q_HEAD_POINTER have an unexpected high bit, and Q_COMPLETED_POINTER is zero when using the Multi-Channel DMA P for PCI Express*?

Description

Due to a problem in the Quartus® Prime Pro Edition software version 24.1 and earlier, when using the Multi-Channel DMA IP for PCI Express*, you may observe unexpected values when reading the Queue Control (QCSR) register associated with MCDMA lockup.

Resolution

This problem is fixed beginning with the Quartus® Prime Pro Edition Software version 24.2.