Why does my Stratix V PLL simulate incorrectly when using models created in the Quartus II software version 11.1sp2 or earlier?

Description

Due to a problem in the Quartus® II software version 11.1 SP2 and earlier, incorrect Stratix® V PLL simulation models may cause the PLL output frequency to show higher than expected output frequency value if you have two or more independent Altera_PLL megafunctions in your testbench.

Resolution

This problem is fixed beginning with the Quartus II software version 12.0.