Why does my F-Tile Ethernet Intel® FPGA Hard IP Design Example fail to acquire corrected received data in 50GE-2 OTN Variant ?

Description

Due to a problem in the F-Tile Ethernet Intel® FPGA Hard IP in the Intel® Quartus® Prime Software v21.2, RX PCS66 output data is corrupted in 50GE-2 OTN variant (both FGT and FHT transceivers)

Resolution

This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 21.3.