Why does HPS Coresight Trace Clock detection fail with Quartus® Prime Pro version 25.3?

Description

Due to a problem in the Quartus® Prime Pro Edition Software version 25.3, the 'tpiu_trace_ctl' port is now tied to 0, causing a failure that did not occur when the port was left unconnected in previous versions.

Resolution

To work around this problem, perform the following steps:

1. Run the IP Generation stage of the Quartus® compilation flow.
2. Modify the generated file from IP Generation:
   1. Change in file: <ip_path>/hps_subsys/agilex_hps/intel_sundancemesa_hps_100/synth/agilex_hps_intel_sundancemesa_hps_100_*.v

Original:

 

Modified:

 

3. Continue the Quartus® Compilation flow from Analysis & Synthesis onward.
(Note: Do not run the IP Generation stage again)

This problem is scheduled to be resolved in a future release of the Quartus® Prime Pro Edition Software.