Why does Active Serial x4 fail configuration for Intel Agilex® 7 FPGA devices?

Description

Due to a problem in Intel® Quartus® Prime Pro Software version 21.1,  under the  Assignments menu --> Device --> Device and Pin Options --> Configuration  -->  Configuration scheme  --> Active Serial x4 -->  Active serial clock source, if you select AS_CLK setting as 133MHz or 108MHz for Active Serial x4 mode, the configuration will fail because Intel Agilex® 7 FPGA does NOT support 133MHz and 108MHz options for AS_CLK in Active Serial x4 mode. 

Resolution

DO NOT choose options 133MHz and 108MHz for Active serial clock source in Active Serial x4 mode.

These options are removed starting with the Intel® Quartus® Prime Pro Edition Software version 21.2.