Knowledge Base Article
Why do reading/writing registers via JTAG return garbage value while performing hardware testing of the design example for the Triple-Speed Ethernet FPGA IP?
Description
Due to a problem in the Quartus® Prime Pro Edition Software version 25.1, a hardcoded JTAG master value in the basic.tcl file causes the TCL script to override the user-selected JTAG master value, leading to incorrect/invalid register reads and writes, which results in garbage values.
Resolution
To work around this problem and ensure that the correct JTAG master selected by the user is used during register read and write operations, perform the following steps:
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Replace the file <design_example_dir>/hardware_test_design/hwtest/agx/2xtbi_pma/basic/basic.tcl with the new basic.tcl file from the attachment.
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Run the hardware testing for the design example using the modified script files.
This problem will be fixed in a future release of the Quartus® Prime Pro Edition Software.