Why do I see "X"s on my Reed-Solomon II encoder outputs?

Description

Due to a problem with the Quartus® Prime version 15.1 software, you will see this behavior if you instantiate more than one Reed-Solomon II (RS-II) IP core in your design.

Resolution

The problem occurs because the msim_setup.tcl file (or the equivalent for your simulator) compiles both instances into the same library.

To work around this problem, edit the tcl script to add a new library, and move one of the instantiations to that library.

For example you may see the following lines:

ensure_lib ./libraries/_highspeed_rs_enc_151/      
vmap       altera_highspeed_rs_enc_151  ./libraries/altera_highspeed_rs_enc_151/      

...

eval  vlog -sv "/hs_rs_248_216_enc/altera_highspeed_rs_enc_151/sim/altera_highspeed_rs_enc_lagr_pkg.sv"  -work altera_highspeed_rs_enc_151

eval  vlog -sv "/hs_rs_248_232_enc/altera_highspeed_rs_enc_151/sim/altera_highspeed_rs_enc_lagr_pkg.sv"  -work altera_highspeed_rs_enc_151

...

eval vsim -novopt -t ps -L work -L work_lib -L altera_common_sv_packages ... -L altera_highspeed_rs_enc_151 

You would then modify as follows:

ensure_lib ./libraries/_highspeed_rs_enc_151/      
vmap       altera_highspeed_rs_enc_151  ./libraries/altera_highspeed_rs_enc_151/
ensure_lib ./libraries/_highspeed_rs_enc_151_2/      
vmap       altera_highspeed_rs_enc_151_2  ./libraries/altera_highspeed_rs_enc_151_2/      

...

eval  vlog -sv "/hs_rs_248_216_enc/altera_highspeed_rs_enc_151/sim/altera_highspeed_rs_enc_lagr_pkg.sv"  -work altera_highspeed_rs_enc_151

eval  vlog -sv "/hs_rs_248_232_enc/altera_highspeed_rs_enc_151/sim/altera_highspeed_rs_enc_lagr_pkg.sv"  -work altera_highspeed_rs_enc_151_2

...

eval vsim -novopt -t ps -L work -L work_lib -L altera_common_sv_packages ... -L altera_highspeed_rs_enc_151 -L altera_highspeed_rs_enc_151_2

This problem is scheduled to be fixed in a future Quartus Prime release.