Knowledge Base Article

Why do I see stability problems with the JESD204C design examples which use the F-Tile JESD204C FPGA IP in external loopback?

Description

Due to a problem in the Quartus® Prime Pro Edition Software version 22.3, the JESD204C design examples which use the F-Tile JESD204C FPGA IP in external loopback may experience stability problems.

Depending on the exact variant you are using, these problems might manifest themselves as emb_unlock_err, sh_unlock_err, rx_gb_underflow_err, cmd_par_err, invalid_eoemb, invalid_eomb, invalid_sync_header and lane_deskew_err events.

Resolution

A patch is available to fix this problem for the Quartus® Prime Pro Edition Software version 22.3.
Download and install patch 0.11 from the appropriate link below, then re-generate your programming file.

This problem is fixed beginning with the Quartus Prime Pro Edition Software version 22.4.

Updated 4 days ago
Version 3.0
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