Why do I see read or write transactions on the BAM or H2D MM/H2D ST device port of the Scalable Scatter-Gather DMA FPGA IP not completed?

Description

Due to a problem in the Quartus® Prime Pro Edition Software version 24.2, transactions of the Scalable Scatter-Gather DMA FPGA IP may not be completed when the connected downstream AXI-4/AXI-ST Subordinate or Avalon-ST Sink port did not respond to the BAM or H2D MM/H2D ST interface. This problem does not impact the D2H ST interface.  

Resolution

For BAM transactions that cannot be completed, this problem can be recovered by resetting the Scalable Scatter-Gather DMA FPGA IP.

For H2D MM/H2D ST transactions that cannot be completed, this problem can be recovered by resetting respective H2D MM/H2D ST interface.

This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software.