Why do I see elaboration time errors when simulating the Intel® Stratix® 10 designs in Aldec Riviera-PRO* 2017.02?

Description

Due to a bug in Aldec Riviera-PRO* 2017.02, you may see elaboration time errors similar to the line below when simulating the Intel® Stratix® 10 designs.

# KERNEL: ERROR: The attributes for bit 'cr_rlpbk_en' have illegal conflicting values

Resolution

Contact Aldec for a later version of Riviera-PRO* with a fix for this problem.