Why do I read the wrong values from my VHDL 3D array in hardware and gate level simulation?

Description

Due to a problem in the Intel® Quartus® Prime Pro Edition software version 20.3, you may see that an incorrect value is returned from reads to a 3D array in hardware and gate level simulation. This problem occurs when array is implemented as ROM or RAM in elaboration.

Resolution

To work around this problem, rewrite the 3D array as a 2D array.

This problem is fixed starting with the Intel® Quartus® Prime Pro Edition software version 20.4.