Why do I get a fatal error when simulating a PLL in ModelSim?

Description

Due to a problem in the Quartus® II software, you may see the following errors when simulating using ModelSim if your design contains an Altera PLL megafunction with dynamic phase shift port enabled. This problem affects designs targeting Arria V devices where the PLL is generated in VHDL.

# ** Fatal: Error occurred in protected context.
#    Time: 0 ns  Iteration: 0  Protected: /<hierarchical path to PLL>/<protected>/<protected>/<protected> File: nofile
# FATAL ERROR while loading design
# Error loading design

Resolution

To work around this problem, compile the Verilog definitions in arriav_atoms.v instead of arriav_components.vhd and arriav_atoms.vhd. Then have the simulator link to them using the –L option.

For example, put the following command in your .do file or msim_setup.tcl file:

vlog "/eda/sim_lib/arriav_atoms.v" -work arriav