Why aren’t the tx_polinv and rx_polinv ports available when using the transceiver Native PHY IP for Intel® Arria® 10 and Intel® Cyclone®10 devices in Enhanced PCS mode?

Description

The transceiver Native PHY Intel® Arria® 10 and Intel® Cyclone® 10 FPGA IP in Enhanced PCS mode does not have tx_polinv and rx_polinv ports. 

Resolution

You can use the Gearbox Enable RX data polarity inversion and Enable TX data polarity inversion settings to implement static polarity inversion. 

You can implement dynamic polarity inversion by reconfiguring the PHY with different Gearbox Enable RX data polarity inversion and Enable TX data polarity inversion settings.