What are the fixed Altera™ FPGA SDM Firmware issues in Quartus® Prime Pro Edition Software version 24.1?

Description

The released Quartus® Prime Pro Edition Software version 24.1 includes Firmware fixes for the following problems (The release contains all prior fixes and supersedes earlier device firmware releases).

Fixes starting in 24.1:

• Active Serial configuration clock issues on hardware that is not designed to operate at speeds higher than 80 MHz.
• CvP peripheral image configuration time period longer than expected on Initialization Mode
• Programming File Generator tool, the settings file .pfg incorrectly saved.
• HPS boot first reconfiguration issue resulting in hanging in Agilex™ 7 M-series devices.

Please refer to the related articles at the bottom page for more details.

Resolution

Download and install Quartus® Prime Pro Edition Software version 24.1 or the Stand-Alone Quartus® Prime Pro Edition Software Programmer and Tools version 24.1 to include these fixes.

• Recompilation is not required.
• All programming files should be recreated.
• Re-run programming file generation or conversion using the Quartus® Prime Software programming file generator.

Related Articles

000097629:Why do I see SDM-based Intel® FPGAs fail to boot from QSPI flash?

000098697:Why does the Agilex™ 7 CvP Periphery Image configuration take longer than expected?

000098698:Why does the Quartus® Programming File Generator tool incorrectly generate a .pfg setting file?

000097266:Why does the FPGA reconfiguration of Agilex® 7 M-series hang when using HPS First boot order?