Knowledge Base Article
Warning (332174): Ignored filter at sld_hub_ctrl.sdc(23): *altera_streaming_sld_hub_controller_*_altclkctrl_altclkctrl_component|sd1|outclk could not be matched with a pin
Description
Due to a problem in the Quartus® Prime Pro Edition Software version 23.4 and earlier, you might see this warning in the Timing Analyzer when your design includes the JTAG-Over-Protocol FPGA IP.
Resolution
This warning is safe to ignore and is scheduled to be removed in a future release of the Quartus® Prime Pro Edition Software.
Updated 1 month ago
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