Warning (308023): (Medium) Rule R102: External reset signals should be synchronized using two cascaded registers.

Description

Due to a problem in the Quartus® II software version 12.1 SP1 and earlier, Design Assistant may incorrectly issue R102 warnings. This problem affects designs where a dual-stage reset is created by using an input pin to drive an asynchronous set/clear and a D input driven by PWR/GND to create a synchronous release.

Resolution

This warning is safe to ignore. Information on proper reset syncronization can be found in the Quartus II Help topic External Reset Should be Synchronized Using Two Cascaded Registers (Design Assistant Rule).

This problem is fixed beginning with the Quartus II software version 13.0.