Knowledge Base Article

Speed Change Issue for Cyclone V Hard IP for PCI Express IP Core

Description

The Cyclone V Hard IP for PCI Express IP Core may enter the LTSSM state Recovery.Rcvlock after a speed change from Gen1 to Gen2 or from Gen2 to Gen1.

Resolution

This issue is fixed in version 13.1 of the Quartus II software.

Updated 3 months ago
Version 2.0
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