Should I insert a memory barrier instruction before issuing DMASEV to CPU?

Description

The recommendation from ARM and Altera is to insert a memory barrier instruction before issuing DMASEV instruction to CPU to avoid DMA controller signaling an interrupt before AXI transfers is completed.

Resolution

The HWlibs DMA driver alt_dma.c is being updated with a Memory Barrier Instruction added before DMASEV instruction as shown below.

if (send_evt)
{
if (status == ALT_E_SUCCESS)
        {
        status = alt_dma_program_DMAWMB(program);
        }
        if (status == ALT_E_SUCCESS)
        {
            dprintf("DMA[M->M]: Adding event ...\n");
                           status = alt_dma_program_DMASEV(program, evt);
        }
}

The updated version of the HWlibs DMA driver is scheduled to be available in the next release of SoC EDS.