SDI Audio MegaCore Function Designs with SOPC Builder or Qsys Fail to Generate

Description

If you create an SOPC Builder or Qsys design using any of the SDI Audio MegaCore functions, your design fails to generate and shows the following error:

Overwriting different file /myproject/synthesis/submodules/altera_reset_synchronizer.v

Resolution

To generate SDI Audio MegaCore functions in SOPC Builder or Qsys, follow these steps:

1. Open a text editor and type the following commands: <QUARTUS_ROOTDIR>\ip\altera\<sdi_audio_core_name>\src\<sdi_audio_core_name>_hw.tcl
2. Remove the following line: "add_file /../verilog/altera_reset_synchronizer.v {SYNTHESIS}

Replace <sdi_audio_core_name> with audio_embed, audio_extract, clocked_audio_input or clocked_audio_output.