Qsys incorrectly reports the clock rate of an IP core as 0 MHz

Description

In the Quartus II software release version 14.1, Qsys may incorrectly report the clock rate of an IP core as 0 MHz. This issue may occur in Altera IP cores or IP cores you define in _hw.tcl using composition for use in Qsys.

Resolution

There is no workaround.