offset_cancellation_reset Signal is Not Synchronized to reconfig_clk in IP Compiler for PCI Express Stratix IV Chaining DMA Example Design

Description

The offset_cancellation_reset signal in the Stratix IV chaining DMA example design for the IP Compiler for PCI Express is synchronized to changes in the reconfig_clk_locked signal and not to the reconfig_clk clock. As a result, the SERDES might occasionally function incorrectly.

Resolution

This issue has no workaround.

This issue will be fixed in a future version of the IP Compiler for PCI Express chaining DMA example.