MGL_INTERNAL_ERROR: Port object altpll_avalon|altpll inst sd1|phasecounterselect of width 3 is being assigned the port altpll_avalon|w_phasectrsel of width 4 which is illegal, as port widths don't match nor are multiples.

Description

Due to a problem in the Quartus® II software version 15.0 and earlier, you will get this error if an ALTPLL is generated in the Platform Designer with the Dynamic Phase Stepping feature enabled when targeting an Intel®  MAX® 10 device.

Resolution

If using Dynamic Phase Stepping, implement the ALTPLL outside Platform Designer to avoid getting this error.

This problem has been fixed in the Quartus II software v14.0