Is there any issue with Cyclone V SoC HPS support for DDR2 design which has width less than 24 bits?

Description

Due to an issue with the Quartus® II software version 13.0sp1 and earlier, the Cyclone® V SoC HPS support for DDR2 SDRAM controller with UniPHY is not available. A design implementing the HPS SDRAM controller for DDR2 SDRAM with a width less than 24 bits will not work in hardware.

Resolution

This issue has been fixed with the Quartus II software version 13.1 and later.