Is there a known issue with the mif file generated for PLL reconfiguration, for Intel® Arria® V, Cyclone® V, and Stratix® V devices?

Description

Yes, when the Altera_PLL Megawizard is used to generate a Memory Initialization File (.mif) for Arria® V, Cyclone® V or Stratix® V devices, the generated file will contain the incorrect DATA Bandwidth field.

Resolution

Update the DATA bandwidth field to the correct value.  The location of the field is shown in table 7 of 661: Implementing Fractional PLL Reconfiguration with Altera PLL and Altera PLL Reconfig IP Cores. The correct bandwidth setting may be found using the PLL Reconfiguration Calculator.