Knowledge Base Article

Is the conf_reset input in the Intel Configuration Reset Release Endpoint to Debug Logic IP asynchronous?

Description

Yes, the conf_reset input in the Intel® Configuration Reset Release Endpoint to Debug Logic IP is an asynchronous signal.

Resolution

A future release of the Intel® Quartus® Prime Pro Edition Software User Guide: Partial Reconfiguration will be updated with this information.

Updated 2 months ago
Version 3.0
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