Internal Error: Sub-system: VRFX, File: /quartus/synth/vrfx/verific/verilog/veriname_elab.cpp, Line: 836

Description

Due to a problem in the Quartus® Prime Standard Edition Software version 17.1 and earlier, you may see this internal error during synthesis.

Internal Error: Sub-system: VRFX, File: /quartus/synth/vrfx/verific/verilog/veriname_elab.cpp, Line: 836
read to RAM wasn't mapped to a specific read port

Resolution

To work around this problem, prevent RAM conversion from an unpacked array through the Quartus Setting File(QSF).

    set_global_assignment -name AUTO_RAM_RECOGNITION OFF -entity <module_name>

    or

    set_global_assignment -name AUTO_RAM_RECOGNITION OFF -to <instance_path>