In the 100GbE MAC and PHY IP Core, the CAUI-4 configuration must use the 644 MHz transceiver reference clock

Description

The CAUI-4 configuration of the 100GbE MAC and PHY IP core does not support the 322 MHz transceiver reference clock. You must use the 644 MHz transceiver reference clock.

Versions 13.0 and later of the 40- and 100-Gbps Ethernet MAC and PHY MegaCore Function User Guide document this transceiver reference clock frequency requirement. However, the 40- and 100-Gbps Ethernet MAC and PHY parameter editor incorrectly indicates that the 322 MHz transceiver reference clock frequency is available for the CAUI-4 variations.

Resolution

This issue has no workaround.

This issue is documented in version 13.0 of the 40- and 100-Gbps Ethernet MAC and PHY MegaCore Function User Guide.