How do I decide when to compensate for the package delay mismatch (Package Deskew) when routing the board traces for my memory interface?

Description

Package deskew is not required for any memory protocol operating at 800 MHz or below.

Resolution

For DDR3 and RLDRAM3 design operating above 800 MHz, Intel recommends that you run the timing analysis with accurately entered board skew parameters in the intellectual property (IP) parameter editor. Only if you are getting non-core timing violations in the 'Report DDR' Timing report then you should apply the steps mentioned in the ‘Package Deskew’ section of the Volume 2 Chapter 4 of the EMIF Handbook.  The recommendation may be different from the solution shown in the External  Memory Interface Handbook. Intel is in the process of updating the handbook.