For DDR2 and DDR3 SDRAM Controller with UniPHY, Designs Without Leveling Fail in Stratix V Devices

Description

If you target Stratix V devices with a IP core without leveling, the design fails.

Resolution

To work around this issue, disable the DM pins.The MegaWizard interface does not support design without leveling targeting Stratix V devices (the option is disabled), but you can generate a Stratix V design with leveling.