Fatal: (vsim-3817) Port "configupdate" of entity "system_altpll_0" is not in the component being instantiated.

Description

Due to a problem in the Quartus® Prime Standard Edition Software version 18.1 and earlier, you may see Fatal Error message mentioned above when simulating VHDL based simulation model of ALTPLL FPGA IP.

Resolution

To work around this problem, update simulation script to use the IP top level wrapper file from <ip name>/synthesis/ directory instead of <ip name>/simulation/ directory.