Knowledge Base Article

Error(14566): The Fitter cannot place 1 periphery component(s) due to conflicts with existing constraints (1 PHYLITE_GROUP(s)).

Description

Due to the limitation of the PHY Lite for Parallel Interfaces Intel® FPGA IP, you may see the error message above if you have more than one PHY Lite for Parallel Interfaces Intel FPGA IP place in the same I/O bank.

Resolution

To work around this problem, avoid placing more than one PHY Lite for Parallel Interfaces Intel® FPGA IP place in the same I/O bank. This is because each of the PHY Lite for Parallel Interfaces Intel FPGA IP has a specific interface requirement which required a specific PLL setting. However, there is only one PLL available in a given bank.

Updated 3 months ago
Version 2.0
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